A throughput (e.g., a rate of a successful message delivery over a communication channel measured by a number of data bits per second) deficiency may occur in an integrated circuit (e.g., a semiconductor integrated circuit, silicon chip, etc.). The throughput loss may be the result of an architectural constraint and/or a design limitation (e.g., a clock frequency is not sufficient, a bus width may be lower than required, a design of an interconnect hampers throughput, etc.) within the integrated circuit. Thus, an integrated circuit designer may use a process to detect the throughput loss in order to validate a network architecture of the integrated circuit.
The process may include calculating a total number of packets (e.g., a data packet) transferred from a point A to a point B (e.g., a transmission line, a computer bus, etc.) in a software specified time window. However, the software specified time window may provide an erroneous time frame (e.g., a system clock may be change). Also, a software program used for calculation of the throughput may be external to the integrated circuit. A throughput calculation performed by the software program may not include feedback or information regarding lack of throughput in a particular transmission line. Thus, it may not be able to calculate a deficiency of throughout at a particular point in the integrated circuit.
The process may also include receiving a number of packets and/or stripping each packet to obtain an amount of traffic information (e.g., a data of a control information layer). The bits of the amount of traffic information may later be added with the remaining bits from the number of packets in order to determine a total bit value to calculate the throughput. However, this process may consume processor resources. For example, a process of stripping packets requires a certain number of processor cycles which may be an overhead to a processor.
The process may also include dumping a number of packets in a log file and/or then calculating the throughput based on a number of bits in the number of packets per second. The user may be required to review the log file. The log file may contain a threshold number of packets such that the process may be inefficient and/or time consuming. Also, this process may be available during a simulation (e.g., a verification cycle) and/or not available during an actual use of the integrated circuit.